1. Field of the Invention
The present invention relates to a semiconductor device and a method of manufacturing the semiconductor device.
2. Description of the Background Art
A package of a semiconductor device, for example, a power MOSFET (Metal Oxide Semiconductor Field Effect Transistor), an IGBT (Insulated Gate Bipolar Transistor) which is a power semiconductor device or the like is often formed by resin sealing through transfer molding in respect of a manufacturing cost, a productivity and the like. Also In the case where Si (silicon) and SiC (silicon carbide) that are mainstream base materials are applied to the power semiconductor device, the resin sealing is often carried out through the transfer molding.
For example, Japanese Patent No. 5012772 discloses the semiconductor device subjected to the resin sealing. In the case of the Japanese Patent No. 5012772, there is disclosed the structure in which an electrode erected on a surface of a sealing resin is exposed in consideration of reduction in size of the device and convenience of wiring.
In Japanese Patent Application Laid-Open No. 2012-74543, further, there is used the direct lead bonding method of directly connecting electrodes to each other in place of connection of an emitter electrode and a lead terminal through a bonding wire in order to reduce a power loss in a semiconductor device subjected to transfer molding. Furthermore, the electrode post bonded in such a way as to be erected on the plate electrode disposed on the chip is provided to be exposed to the outside.
Referring to the power semiconductor device, development continuously advances toward application of an element using, as a base material, a material which can be operated at a high temperature and is represented by SiC. Thus, there is a demanded structure in which an operation can be carried out at a high temperature and a capacity can be enlarged.
In the case where the enlargement of the capacity is to be further implemented without increase in size of the device in the semiconductor device, it is necessary to effectively utilize a space in the device by disposition of the electrode of the semiconductor element below the control board or the like as is disclosed in Japanese Patent Application Laid-Open No. 2006-303006, for example.